Update model card with training details

README.md

@@ -1,57 +1,80 @@
 ---
-library_name: peft
-license: gemma
-base_model: google/gemma-2b-it
+license: apache-2.0
+language: code
 tags:
-- generated_from_trainer
+  - gemma
+  - qlora
+  - circuit-synthesis
+  - verilog
+  - llm
+  - electronic-design-automation
+  - peft
+  - google-colab
 model-index:
-- name: veriforge-gemma-2b-it
-  results: []
+  - name: veriforge-gemma-2b-it
+    results: []
 ---
 
-<!-- This model card has been generated automatically according to the information the Trainer had access to. You
-should probably proofread and complete it, then remove this comment. -->
+# Veriforge-Gemma-2B-IT 🔧
 
-# veriforge-gemma-2b-it
+**`veriforge-gemma-2b-it`** is a QLoRA-fine-tuned version of [`google/gemma-2b-it`](https://huggingface.co/google/gemma-2b-it) that specializes in prompt-based circuit synthesis for digital logic design, specifically in Verilog HDL.
 
-This model is a fine-tuned version of [google/gemma-2b-it](https://huggingface.co/google/gemma-2b-it) on the None dataset.
+## 🚀 Model Description
 
-## Model description
+- **Base Model**: [`google/gemma-2b-it`](https://huggingface.co/google/gemma-2b-it)
+- **Fine-tuned By**: [louijiec](https://huggingface.co/louijiec)
+- **Method**: QLoRA using PEFT and bitsandbytes
+- **Data**: 500 simulated Verilog gate examples (AND, OR, NAND, etc.)
+- **Platform**: Google Colab
 
-More information needed
+## 🧐 Example Usage
 
-## Intended uses & limitations
+```python
+from transformers import AutoModelForCausalLM, AutoTokenizer
 
-More information needed
+model_id = "louijiec/veriforge-gemma-2b-it"
+tokenizer = AutoTokenizer.from_pretrained(model_id)
+model = AutoModelForCausalLM.from_pretrained(model_id)
 
-## Training and evaluation data
+prompt = "### Prompt:\nWrite Verilog code for a 3-input XOR gate.\n\n### Response:\n"
+inputs = tokenizer(prompt, return_tensors="pt")
+outputs = model.generate(**inputs, max_new_tokens=100)
+print(tokenizer.decode(outputs[0], skip_special_tokens=True))
+```
 
-More information needed
+## 🧪 Sample Output
 
-## Training procedure
+```verilog
+module nand_3_input (output y, input a0, a1, a2);
+  assign y = ~(a0 & a1 & a2);
+endmodule
+```
 
-### Training hyperparameters
+## 📚 Training Details
 
-The following hyperparameters were used during training:
-- learning_rate: 5e-05
-- train_batch_size: 2
-- eval_batch_size: 8
-- seed: 42
-- gradient_accumulation_steps: 4
-- total_train_batch_size: 8
-- optimizer: Use OptimizerNames.ADAMW_TORCH with betas=(0.9,0.999) and epsilon=1e-08 and optimizer_args=No additional optimizer arguments
-- lr_scheduler_type: linear
-- num_epochs: 10
-- mixed_precision_training: Native AMP
+- LoRA rank: 8
+- Bits: 4-bit (QLoRA)
+- Max tokens: 512
+- Optimizer: AdamW, FP16
+- Epochs: 10
+- Batch Size: 2
+- Gradient Accumulation: 4
+- Logging Steps: 10
 
-### Training results
+## 📌 Citations
 
+- Gemma by Google: https://huggingface.co/google/gemma-2b-it
+- QLoRA: https://arxiv.org/abs/2305.14314
+- PEFT: https://github.com/huggingface/peft
 
+## ⚠️ Limitations
 
-### Framework versions
+- Trained only on simple gates
+- No memory/state logic (flip-flops, FSMs, etc.)
+- No formal verification or testbench evaluation
 
-- PEFT 0.15.2
-- Transformers 4.52.4
-- Pytorch 2.6.0+cu124
-- Datasets 3.6.0
-- Tokenizers 0.21.1
+## 💪 Future Work
+
+- Add support for more circuit components (MUX, ALU)
+- Formal testbench generation
+- Build EDA pipeline integrations