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<title>SupraLabs | Hidden Topology: Depth vs. Width Scaling for SLMs</title>
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<body>
<div class="container">
<header>
<div class="logo-area" style="font-size: 1.5em;">
<a href="index.html"><h1><img src="./image.png" style="height: 2em" alt="Logo"> SupraLabs_</h1></a>
</div>
<nav>
<a href="#summary">Core Learnings</a>
<a href="#benchmarks">Topology Matrix</a>
<a href="#charts">Visualizations</a>
<a href="https://huggingface.co/SupraLabs" target="_blank">HuggingFace</a>
</nav>
</header>
<section class="hero">
<h2>Experiment #4:<br>Hidden Topology — Depth vs. Width</h2>
<p>An isolated geometric sweep allocating a uniform parameter budget (~5M) to explore structural limits. We stressed tested deep sequential layers against shallow parallel computing layers over <strong>50,000,000 unique tokens</strong> using local bfloat16 hardware accelerator engines.</p>
</section>
<span class="section-label" id="summary">// Structural_Discoveries_&_Compute_Autobahns</span>
<div class="card">
<h3>Shallow & Wide Monopolizes the Megabyte Scale</h3>
<p>Traditional deep-network assumptions state that depth unlocks highly abstract multi-step logic circuits. Our empirical architectural investigation completely reverses this paradigm for Small Language Models (SLMs) under 10M parameters:</p>
<ul>
<li><strong>The Bottleneck of Extreme Depth:</strong> Forcing a 4.2M model into a 12-layer deep structure shrinks internal tracking states down to an informational choke point. The layers are too narrow to retain text variations simultaneously.</li>
<li><strong>Massive Parallel Compute Highways:</strong> Truncating the architecture to 3 layers while expanding layer dimensions (Hidden: 256) establishes optimal neuronal real-estate. The weights map raw token dependencies instantly in parallel graphs.</li>
<li><strong>Hardware Acceleration Exploitation:</strong> Because sequential deep layer dependencies are cut, GPU execution pipelines run unfettered. Model througput spikes by 91%, delivering optimal performance profiles at minimal energy footprint.</li>
</ul>
</div>
<span class="section-label" id="benchmarks">// Topology_Evaluation_Data</span>
<div class="card" style="padding: 1.5rem;">
<h3>Controlled Architectural Sweeps</h3>
<p>Pretrained via optimized hyperparameter constants. Perplexity (PPL) and Lower Pretrain Loss track the precision of language acquisition.</p>
<div class="table-container">
<table>
<thead>
<tr>
<th>Structural Metric</th>
<th>Exp 1: Deep & Narrow</th>
<th>Exp 2: Balanced Baseline</th>
<th style="color: var(--success)">Exp 3: Shallow & Wide (🏆 Win)</th>
</tr>
</thead>
<tbody>
<tr>
<td class="mono">Layer Configuration</td>
<td>12 Layers (Hidden: 128)</td>
<td>6 Layers (Hidden: 192)</td>
<td style="color: var(--success)">3 Layers (Hidden: 256)</td>
</tr>
</tr>
<tr>
<td class="mono">Active Model Parameters</td>
<td>4,197,504</td>
<td>5,114,304</td>
<td>5,244,672</td>
</tr>
<tr>
<td class="mono">Pretrain Step Loss (↓)</td>
<td>4.539</td>
<td>4.345</td>
<td style="color: var(--success); font-weight: bold;">4.188</td>
</tr>
<tr>
<td class="mono">Pretrain Train Loss (↓)</td>
<td>5.567</td>
<td>5.302</td>
<td style="color: var(--success);">5.093</td>
</tr>
<tr>
<td class="mono">ARC-Easy Zero-Shot (↑)</td>
<td>29.17%</td>
<td>29.63%</td>
<td class="winner-badge">29.97%</td>
</tr>
<tr>
<td class="mono">Wikitext Word PPL (↓)</td>
<td>817.8844</td>
<td>585.5899</td>
<td class="winner-badge">418.6314</td>
</tr>
<tr>
<td class="mono">Compute Throughput (⚡)</td>
<td>218.7 samples/sec</td>
<td>282.9 samples/sec</td>
<td class="winner-badge">417.9 samples/sec</td>
</tr>
<tr class="highlight-row">
<td style="font-weight: bold;">EFFICIENCY MATRIX</td>
<td style="color: var(--warning)">Severe Structural Bottleneck</td>
<td>Intermediate Compression</td>
<td style="color: var(--success); font-weight: bold;">SOTA TOPOLOGY SWEETSPOT</td>
</tr>
</tbody>
</table>
</div>
</div>
<span class="section-label" id="charts">// Visualizing_Structural_Performance</span>
<div class="chart-box">
<h3>Downstream Perplexity Collapse vs. Topology</h3>
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<canvas id="topologyChart"></canvas>
</div>
</div>
<div class="chart-box">
<h3>The Hardware Advantage: Active Processing Speeds</h3>
<p style="font-size: 0.85rem; color: var(--muted); margin-bottom: 1.5rem;">Fewer structural steps cut matrix synchronization gaps, unlocking maximum execution parallelization on local Tensor Core engines.</p>
<div style="position: relative; height:350px; width:100%">
<canvas id="throughputChart"></canvas>
</div>
</div>
<section class="stats-grid" id="hardware">
<div class="stat-box">
<small>COMPUTE TENSOR ENGINE</small>
<strong>Local bfloat16 Hardware Run</strong>
</div>
<div class="stat-box">
<small>CONSTANT SEARCH ENGINE</small>
<strong>Optuna Peak LR 0.001178</strong>
</div>
<div class="stat-box">
<small>OPTIMAL LAYOUT PROFILE</small>
<strong>3-Layer Wide Configuration</strong>
</div>
</section>
<footer>
<p>© 2026 SupraLabs. High performance. Small footprints. Proudly open-source.</p>
</footer>
</div>
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