tazwarrrr commited on
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7982eca
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1 Parent(s): dccc6b3

fix: remove convolution_2d from evidence table, clarify docstring

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README.md CHANGED
@@ -1,13 +1,14 @@
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  # ⚡ ROCmPort AI
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- A multi-agent pipeline that migrates CUDA kernels to AMD ROCm/HIP — catching the bugs that `hipify` misses, compiling with `hipcc`, profiling with `rocprof` on real MI300X hardware, and iterating until the output is correct and fast.
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-
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- ---
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- ## Live Demo
 
 
 
 
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- - **Backend API**: https://rocmport-ai-q2b1.onrender.com
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- - **HuggingFace Space**: https://huggingface.co/spaces/lablab-ai-amd-developer-hackathon/ROCmPort-AI
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  ---
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@@ -39,6 +40,19 @@ if (tid < 64) {
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  ---
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  ## What ROCmPort AI Does
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  1. **Analyze** — scan CUDA kernel for AMD-specific risks (wavefront size, ballot/shuffle idioms, shared memory layout)
@@ -54,15 +68,24 @@ If the optimized output underperforms the baseline, the coordinator retries the
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  ## Reproducible Demo Results
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- These numbers are deterministic `demo_artifact` values returned by the backend when `ROCM_AVAILABLE=false`. Set `ROCM_AVAILABLE=true` on real MI300X hardware to collect `data_source=real_rocm` results.
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-
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  | Kernel | Input | Baseline HIP | Optimized HIP | Result |
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  |--------|-------|-------------|---------------|--------|
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- | matrix_multiply | demo artifact | 121.4ms | 89.1ms | **1.36x speedup** |
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- | reduction | demo artifact | 88.2ms | 68.7ms | **1.28x speedup** |
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- | vector_add | demo artifact | 45.1ms | 38.2ms | **1.18x speedup** |
 
 
 
 
 
 
 
 
 
 
 
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- Hardware class: AMD Instinct MI300X, 192GB HBM3, wavefront=64
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  ---
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  # ⚡ ROCmPort AI
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+ ![ROCm](https://img.shields.io/badge/ROCm-7.0-red) ![Hardware](https://img.shields.io/badge/Hardware-MI300X-blue) ![License](https://img.shields.io/badge/License-Apache%202.0-green) ![HuggingFace](https://img.shields.io/badge/Dataset-HuggingFace-yellow)
 
 
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+ > **Live Demos**
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+ >
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+ > 🚀 **Backend API**: https://rocmport-ai-q2b1.onrender.com
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+ >
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+ > 🤗 **HuggingFace Space**: https://huggingface.co/spaces/lablab-ai-amd-developer-hackathon/ROCmPort-AI
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+ A multi-agent pipeline that migrates CUDA kernels to AMD ROCm/HIP — catching the bugs that `hipify` misses, compiling with `hipcc`, profiling with `rocprof` on real MI300X hardware, and iterating until the output is correct and fast.
 
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  ---
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  ---
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+ ## How It's Different From hipify
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+
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+ | | hipify-clang | ROCmPort AI |
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+ |---|---|---|
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+ | API renaming | ✅ | ✅ |
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+ | Wavefront-64 bug detection | ❌ | ✅ |
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+ | Compile verification | ❌ | ✅ |
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+ | Profiler feedback loop | ❌ | ✅ |
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+ | Correctness guarantee | ❌ | Partial |
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+ | Fine-tuned model | ❌ | ✅ |
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+
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+ ---
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+
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  ## What ROCmPort AI Does
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  1. **Analyze** — scan CUDA kernel for AMD-specific risks (wavefront size, ballot/shuffle idioms, shared memory layout)
 
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  ## Reproducible Demo Results
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  | Kernel | Input | Baseline HIP | Optimized HIP | Result |
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  |--------|-------|-------------|---------------|--------|
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+ | matrix_multiply | 512×512 | 0.076ms | 0.026ms | **2.91x speedup** |
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+ | vector_add | 32M elements | | 0.098ms | **3,918 GB/s bandwidth (74% of MI300X peak)** |
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+ | reduction | 16M elements | | 0.042ms | **correctness PASS (wavefront-64 fix)** |
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+
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+ > Source: `docs/benchmark_runs/` — real rocprof CSV output, MI300X gfx942, ROCm 7.0, May 8 2026
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+
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+ ---
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+
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+ ## Proof of Hardware
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+
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+ Raw rocprof CSV output committed to this repo:
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+ - [`docs/benchmark_runs/matmul_out.stats.csv`](docs/benchmark_runs/matmul_out.stats.csv)
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+ - [`docs/benchmark_runs/vecadd_out.stats.csv`](docs/benchmark_runs/vecadd_out.stats.csv)
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+ - [`docs/benchmark_runs/reduction.stats.csv`](docs/benchmark_runs/reduction.stats.csv)
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+ Hardware: AMD Instinct MI300X VF (gfx942), 192GB HBM3, ROCm 7.0, AMD Developer Cloud
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  ---
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backend/tools/demo_artifacts.py CHANGED
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  """
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  Real rocprof measurements for ROCmPort AI profiling layer.
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- matrix_multiply, vector_add, and reduction values are rocprof-measured on
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- AMD Instinct MI300X (gfx942), ROCm 7.0, AMD Developer Cloud, May 8 2026.
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- Raw profiler CSV files are in docs/benchmark_runs/.
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-
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- convolution_2d: demo_artifact (not yet measured on hardware).
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- custom: simulated conservative estimate.
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  Baseline definition: straight hipify-clang output with minimal compile edits (Baseline A).
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  """
 
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  """
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  Real rocprof measurements for ROCmPort AI profiling layer.
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+ matrix_multiply, vector_add, and reduction entries are sourced from real rocprof
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+ measurements on MI300X gfx942, ROCm 7.0, May 8 2026.
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+ See docs/benchmark_runs/ for raw CSV evidence.
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+ convolution_2d and custom use estimated values and are clearly labelled demo_artifact.
 
 
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  Baseline definition: straight hipify-clang output with minimal compile edits (Baseline A).
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  """
docs/LIVE_RESULTS.md CHANGED
@@ -14,7 +14,8 @@ and match these CSV files exactly.
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  | matrix_multiply (512×512) | 0.076 | 0.026 | 2.91x | — | [matmul_out.stats.csv](benchmark_runs/matmul_out.stats.csv) |
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  | vector_add (32M elements) | — | 0.098 | — | 3,918 GB/s | [vecadd_out.stats.csv](benchmark_runs/vecadd_out.stats.csv) |
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  | reduction (16M elements) | — | 0.042 | — | — | [reduction.stats.csv](benchmark_runs/reduction.stats.csv) |
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- | convolution_2d | 211.7 | 158.3 | 1.34x | 2,134.8 GB/s | demo_artifact (not yet measured) |
 
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  > **Note:** vector_add and reduction were run standalone; no pre-optimisation baseline
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  > was captured in these runs. matrix_multiply baseline is `matmul_baseline` (hipify
 
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  | matrix_multiply (512×512) | 0.076 | 0.026 | 2.91x | — | [matmul_out.stats.csv](benchmark_runs/matmul_out.stats.csv) |
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  | vector_add (32M elements) | — | 0.098 | — | 3,918 GB/s | [vecadd_out.stats.csv](benchmark_runs/vecadd_out.stats.csv) |
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  | reduction (16M elements) | — | 0.042 | — | — | [reduction.stats.csv](benchmark_runs/reduction.stats.csv) |
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+
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+ > **convolution_2d kernel was not profiled in this hardware run and is excluded from the evidence table. Only kernels with traceable rocprof CSV output are reported here.**
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  > **Note:** vector_add and reduction were run standalone; no pre-optimisation baseline
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  > was captured in these runs. matrix_multiply baseline is `matmul_baseline` (hipify