Cofiber Detection Circuit — Research Directions
Dense detection at sub-stride resolution
The circuit's L1-cache-resident weight set (241 KB) permits evaluation at spatial densities impractical for larger detection heads. At 61K INT8 parameters, per-pixel detection across a 640×640 input (409,600 locations × 80 classes) remains within single-digit millisecond latency on CPU. This eliminates the stride-16 quantization of detection locations inherent in patch-based approaches and may improve small-object recall.
Prototype ensemble via weight replication
Multiple instances of the circuit with independently trained prototype sets can be evaluated in parallel and their outputs combined by majority vote. At 241 KB per instance, a 100-member ensemble occupies 24 MB — within L2 cache on commodity hardware. The ensemble diversity comes from different training seeds, data splits, or domain-specific prototype sets. The question is whether ensembling at the prototype level produces complementary detections or redundant ones.
Fusion with backbone computation
The cofiber decomposition (pool + subtract) operates on the same tensor format as the backbone's intermediate attention outputs. Rather than treating backbone and head as sequential stages with a memory-bus boundary between them, the circuit can be fused into the backbone's final block as a post-attention operation. The detection output is produced before the backbone features are written to global memory, eliminating one full read-write cycle.
Inline video detection
The circuit is small enough to execute inside a video decode loop between frame reconstructions. On hardware with a dedicated video decode unit (NVDEC, Intel QSV, Apple VideoToolbox), the detection circuit runs on the CPU cores that would otherwise idle during decode. This produces per-frame detections with zero additional latency beyond the decode itself, without a separate inference pipeline.
Formal verification of circuit properties
The 61,520-parameter weight space is small enough for bounded model checking. Properties amenable to formal verification include: maximum detection count per input (proving the circuit cannot produce more than K detections on any valid feature tensor), mutual exclusion of class pairs at shared locations, and monotonicity of detection score with respect to prototype similarity. These guarantees are relevant for safety-critical deployment where unbounded detection output is unacceptable.
On-device prototype adaptation
Retraining the circuit requires updating a single 80×768 weight matrix — a rank-1 update per corrected class. On a mobile device, a user correction (misclassified detection) translates to a running-average update of the corresponding class prototype: w_c ← (1-α)w_c + α·f_corrected. No optimizer state, no backpropagation, no framework. The prototype update is a vector addition that executes in microseconds. The question is whether online prototype adaptation converges to useful personalization or drifts under distribution shift.
Neuromorphic deployment
The depth-3 circuit with integer weights and Heaviside activation maps directly to spiking neural network hardware (Intel Loihi, IBM TrueNorth, BrainChip Akida). Each threshold gate is one neuron. The fixed-weight layers (pool, subtract) are hardwired connections. The classification layer is a programmable weight matrix loaded once. Event-driven evaluation on neuromorphic hardware consumes power proportional to the number of active detections, not the number of spatial locations evaluated.
Exhaustive INT8 weight search
At 61,520 INT8 parameters, local search over the weight space is tractable. Starting from the trained prototypes, systematically test single-weight perturbations (increment or decrement each INT8 value by 1) and retain changes that improve detection fitness on a held-out set. This is the same pruning methodology used in the 8bit-threshold-computer project (prune_weights.py), applied to detection prototypes rather than arithmetic circuits.